带有偏置电压不敏感电流检测放大器的6-ns 4mb Cmos Sram

Proceedings of 1994 IEEE Symposium on VLSI Circuits Pub Date : 1994-06-09 DOI:10.1109/VLSIC.1994.586239

K. Ishibashi, Koichi Takasugi, K. Komiyaji, H. Toyoshima, T. Yamanaka, A. Fukami, N. Hashimoto, N. Ohki, A. Shimizu, T. Hashimoto, T. Nagano, T. Nishida

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引用次数: 47

摘要

采用0.25-/spl mu/m CMOS技术制备了具有3.84 /spl mu/m/sup 2/ TFT称重传感器的4mb CMOS SRAM，在2.7 V电源电压下实现了6ns的地址访问时间。使用对其失调电压不敏感的电流检测放大器可以实现快速访问时间。升压单元阵列架构允许使用TFT负载单元的快速SRAM的低电压操作。>

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A 6-ns 4-mb Cmos Sram With Offset-voltage-insensitive Current Sense Amplifiers

A 4-Mb CMOS SRAM with 3.84 /spl mu/m/sup 2/ TFT load cells is fabricated using 0.25-/spl mu/m CMOS technology and achieves an address access time of 6 ns at a supply voltage of 2.7 V. The use of a current sense amplifier that is insensitive to its offset voltage enables the fast access time. A boosted cell array architecture allows low voltage operation of fast SRAM's using TFT load cells. >

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Proceedings of 1994 IEEE Symposium on VLSI Circuits

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