基于石墨烯纳米带互连和finfet的16nm逻辑门的研究

2017 2nd International Conference for Convergence in Technology (I2CT) Pub Date : 2017-04-01 DOI:10.1109/I2CT.2017.8226179

Nishtha Khare, Vangmayee Sharda, Anushree

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引用次数: 0

摘要

本文介绍了使用两种新技术(石墨烯纳米带互连(gnr)和16纳米尺度的finfet)对不同数字电路的研究。比较了采用简单互连、石墨烯纳米带互连、finfet和GNR互连设计的数字电路输出端的上升时间和下降时间。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Study of logic gates at 16nm with graphene nanoribbon interconnects and FinFETs

This paper presents a study of different digital circuits using two new technologies called GrapheneNanoribbon interconnects (GNRs) and FinFETs at 16 nm scale. A comparative study of the rise time and fall time is obtained at the output of the digital circuits designed using simple interconnects, using graphenenanoribbon interconnects (GNRs), and using FinFETs and GNR interconnects.

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2017 2nd International Conference for Convergence in Technology (I2CT)

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