{"title":"3-5 GHz CMOS功率放大器在130纳米CMOS超宽带应用","authors":"N. G. El-Feky, Dina M. Ellaithy, M. Fedawy","doi":"10.1109/ICEEE55327.2022.9772578","DOIUrl":null,"url":null,"abstract":"A broadband CMOS power amplifier (PA) working in frequency range starting at 3 GHz to 5 GHz in 130 nm CMOS process for ultra-wideband (UWB) implementations is accomplished in this paper. A cascode scheme (common source transistor followed by common gate transistor) is employed in the design of the achieved power amplifier. To boost the power gain, two stages cascode amplifier with a common source (CS) scheme as the third stage are used covering the operating band. This PA attains a power gain of about 18.86 dB and reaches an excellent flatness of about ±0.3. The output P1dB is about −3 dBm. A broad range of impedance matching at input and output is accomplished. The input return loss (S11), the output return loss (S22), and the reverse isolation (S12) equal about <-5 dB, <−3 dB, and <-100 dB, respectively.","PeriodicalId":375340,"journal":{"name":"2022 9th International Conference on Electrical and Electronics Engineering (ICEEE)","volume":"21 5","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"3-5 GHz CMOS Power Amplifier in 130nm CMOS for UWB Applications\",\"authors\":\"N. G. El-Feky, Dina M. Ellaithy, M. Fedawy\",\"doi\":\"10.1109/ICEEE55327.2022.9772578\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A broadband CMOS power amplifier (PA) working in frequency range starting at 3 GHz to 5 GHz in 130 nm CMOS process for ultra-wideband (UWB) implementations is accomplished in this paper. A cascode scheme (common source transistor followed by common gate transistor) is employed in the design of the achieved power amplifier. To boost the power gain, two stages cascode amplifier with a common source (CS) scheme as the third stage are used covering the operating band. This PA attains a power gain of about 18.86 dB and reaches an excellent flatness of about ±0.3. The output P1dB is about −3 dBm. A broad range of impedance matching at input and output is accomplished. The input return loss (S11), the output return loss (S22), and the reverse isolation (S12) equal about <-5 dB, <−3 dB, and <-100 dB, respectively.\",\"PeriodicalId\":375340,\"journal\":{\"name\":\"2022 9th International Conference on Electrical and Electronics Engineering (ICEEE)\",\"volume\":\"21 5\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 9th International Conference on Electrical and Electronics Engineering (ICEEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEEE55327.2022.9772578\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 9th International Conference on Electrical and Electronics Engineering (ICEEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEE55327.2022.9772578","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3-5 GHz CMOS Power Amplifier in 130nm CMOS for UWB Applications
A broadband CMOS power amplifier (PA) working in frequency range starting at 3 GHz to 5 GHz in 130 nm CMOS process for ultra-wideband (UWB) implementations is accomplished in this paper. A cascode scheme (common source transistor followed by common gate transistor) is employed in the design of the achieved power amplifier. To boost the power gain, two stages cascode amplifier with a common source (CS) scheme as the third stage are used covering the operating band. This PA attains a power gain of about 18.86 dB and reaches an excellent flatness of about ±0.3. The output P1dB is about −3 dBm. A broad range of impedance matching at input and output is accomplished. The input return loss (S11), the output return loss (S22), and the reverse isolation (S12) equal about <-5 dB, <−3 dB, and <-100 dB, respectively.