Y. Kawaguchi, T. Kawano, H. Takei, S. Ono, A. Nakagawa
{"title":"新一代稳压器的最小寄生电感多芯片模块","authors":"Y. Kawaguchi, T. Kawano, H. Takei, S. Ono, A. Nakagawa","doi":"10.1109/ISPSD.2005.1488028","DOIUrl":null,"url":null,"abstract":"This paper analyzes the effects of parasitic inductances over the conversion efficiency of DC-DC converters by using Spice simulator. It was found that the self-turn-on of the low side MOSFET is triggered by large body diode reverse recovery current. A new multi chip module (MCM) has been developed in order to suppress the self-turn-on of the LS MOSFETs and to reduce the parasitic inductances. The MCM also has unique upper surface cooling feature. The MCMs successfully improve the conversion efficiency by using the MOSFETs with reduced body diode reverse recovery. Conversion efficiency can be further improved by reducing the gate resistance and optimizing the dead time","PeriodicalId":154808,"journal":{"name":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","volume":"124 28","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"32","resultStr":"{\"title\":\"Multi Chip Module with Minimum Parasitic Inductance for New Generation Voltage Regulator\",\"authors\":\"Y. Kawaguchi, T. Kawano, H. Takei, S. Ono, A. Nakagawa\",\"doi\":\"10.1109/ISPSD.2005.1488028\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper analyzes the effects of parasitic inductances over the conversion efficiency of DC-DC converters by using Spice simulator. It was found that the self-turn-on of the low side MOSFET is triggered by large body diode reverse recovery current. A new multi chip module (MCM) has been developed in order to suppress the self-turn-on of the LS MOSFETs and to reduce the parasitic inductances. The MCM also has unique upper surface cooling feature. The MCMs successfully improve the conversion efficiency by using the MOSFETs with reduced body diode reverse recovery. Conversion efficiency can be further improved by reducing the gate resistance and optimizing the dead time\",\"PeriodicalId\":154808,\"journal\":{\"name\":\"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.\",\"volume\":\"124 28\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"32\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2005.1488028\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2005.1488028","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multi Chip Module with Minimum Parasitic Inductance for New Generation Voltage Regulator
This paper analyzes the effects of parasitic inductances over the conversion efficiency of DC-DC converters by using Spice simulator. It was found that the self-turn-on of the low side MOSFET is triggered by large body diode reverse recovery current. A new multi chip module (MCM) has been developed in order to suppress the self-turn-on of the LS MOSFETs and to reduce the parasitic inductances. The MCM also has unique upper surface cooling feature. The MCMs successfully improve the conversion efficiency by using the MOSFETs with reduced body diode reverse recovery. Conversion efficiency can be further improved by reducing the gate resistance and optimizing the dead time