用于流水线adc的电阻退化线性化动态残差放大器

Ziwei Li, Guoyao Wu, Yutong Zhao, Fan Ye, Junyan Ren
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引用次数: 0

摘要

残差放大器是流水线ADC设计的关键部分。剩余放大器的线性度直接影响到流水线ADC的线性度。本文将电阻退化线性化技术引入到动态剩余放大器的设计中。采用28nm CMOS技术,以100MS/s的速度对NMOS和CMOS动态放大器进行了实现和仿真。仿真结果表明,经过前景校准后,两种动态放大器的输出振幅均大于-77dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Resistive Degeneration Linearization Dynamic Residue Amplifiers for Pipelined ADCs
Residue amplifier is a crucial part of a pipelined ADC design. The linearity of the residue amplifier directly affects the linearity of the pipelined ADC. This paper introduces the resistive degeneration linearization technique into dynamic residue amplifier designs. Both NMOS and CMOS dynamic amplifiers are implemented and simulated with a 28nm CMOS technology at 100MS/s. The simulation results show over -77dB THD for both dynamic amplifiers with large output swings after a foreground calibration.
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