Low-power sample and hold circuits using current conveyor analogue switches

This study presents low-power sample and hold (S/H) circuits using second-generation current conveyor (CCII). Unlike previous S/H circuits, switch of the proposed S/H circuits can be obtained using CCII which works as current conveyor analogue switch (CCAS). The state of CCAS is controlled by sampling pulse that can be applied via its bias current source. The proposed S/H circuits offer low-power consumption, high-speed and absent from non-overlapping clock signal requirements. Three configurations of S/H circuit are proposed, namely single-ended S/H, differential S/H and serial-to-parallel S/H circuits. The proposed S/H circuits have been simulated using 0.18 μm complementary metal oxide semiconductor (CMOS) process from Taiwan semiconductor manufacturing company (TSMC). The simulation results are used to confirm the workability of the proposed structures.