基于3D-TSV的片上电磁电感，背面为平面磁芯，采用14nm三栅极CMOS

2017 Symposium on VLSI Circuits Pub Date : 2017-06-01 DOI:10.23919/VLSIC.2017.8008574

H. Krishnamurthy, Sheldon Weng, G. Matthew, Ruchir Saraswat, K. Ravichandran, J. Tschanz, V. De

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引用次数: 9

摘要

完全集成的数字控制buck VR，具有滞回和PFM控制，可实现最大轻载效率，采用基于3D-TSV的片上螺线管电感，背面平面磁芯采用14nm三栅极CMOS，电感密度为111 nH/mm2，转换效率为80%。

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A digitally controlled fully integrated voltage regulator with 3D-TSV based on-die solenoid inductor with backside planar magnetic core in 14nm tri-gate CMOS

A fully integrated digitally controlled buck VR, featuring hysteretic and PFM control for maximum light load efficiency, with 3D-TSV based on-die solenoid inductor with backside planar magnetic core in 14nm tri-gate CMOS demonstrates 111 nH/mm2 inductance density & 80% conversion efficiency.

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2017 Symposium on VLSI Circuits

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