{"title":"基于单元的VLSI单元分选器设计","authors":"E. Adamides, P. Tsalides, A. Thanailakis","doi":"10.1109/MELCON.1991.161845","DOIUrl":null,"url":null,"abstract":"A description is given of the logical and physical design of a VLSI bit-serial/word-serial cellular automata-based sorter. The sorting mechanism is based on the concurrent operation of a number of tesselation-like automata called cellular logic gates (CLGs). The VLSI circuit that implements the sorting scheme consists of modules of predesigned and precharacterized cells organized in two levels of hierarchy: cellular automata cells and CLGs. The former consist of a memory element and a combinational logic element that constitutes the leaf cells of the cell-based design.<<ETX>>","PeriodicalId":193917,"journal":{"name":"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference","volume":"118 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Cell-based design of a VLSI cellular sorter\",\"authors\":\"E. Adamides, P. Tsalides, A. Thanailakis\",\"doi\":\"10.1109/MELCON.1991.161845\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A description is given of the logical and physical design of a VLSI bit-serial/word-serial cellular automata-based sorter. The sorting mechanism is based on the concurrent operation of a number of tesselation-like automata called cellular logic gates (CLGs). The VLSI circuit that implements the sorting scheme consists of modules of predesigned and precharacterized cells organized in two levels of hierarchy: cellular automata cells and CLGs. The former consist of a memory element and a combinational logic element that constitutes the leaf cells of the cell-based design.<<ETX>>\",\"PeriodicalId\":193917,\"journal\":{\"name\":\"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference\",\"volume\":\"118 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MELCON.1991.161845\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] 6th Mediterranean Electrotechnical Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.1991.161845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A description is given of the logical and physical design of a VLSI bit-serial/word-serial cellular automata-based sorter. The sorting mechanism is based on the concurrent operation of a number of tesselation-like automata called cellular logic gates (CLGs). The VLSI circuit that implements the sorting scheme consists of modules of predesigned and precharacterized cells organized in two levels of hierarchy: cellular automata cells and CLGs. The former consist of a memory element and a combinational logic element that constitutes the leaf cells of the cell-based design.<>