Low voltage CMOS charge pump with excellent current matching based on a rail-to-rail current conveyor

A low voltage charge pump with excellent current matching in a wide dynamic range is proposed. It is aimed to be used in state of the art frequency synthesizers. The key concept is the direct equation of currents, instead of indirectly equating transistor voltages, using the current following action of a second generation current conveyor. The voltage buffer of the current conveyor is used to replicate the operating conditions of the NMOS current sink and create an equal current at the X input. According to the PFD signals this current can be mirrored to the Z output and be used to source current to the charge pump output, while a source switching scheme is used to reduce glitches. The proposed design exhibits both static and dynamic high performance characteristics in terms of very low DC current mismatch, of the order of 0,05%, and suppressed transient glitches. Both these non-idealities degrade performance of PLLs inducing reference spurs and phase offset, and thus must be minimized. The proposed circuit is implemented in TSMC 65nm process and simulation results demonstrate performance in a wide output voltage range from 100mV to 950mV.