{"title":"基于AVS/ABB/偏置存储器阵列闭环调节的汽车级Cortex-R4F SoC","authors":"R. Gomez, E. Bano, A. Cathelin, S. Clerc","doi":"10.1109/VLSICircuits18222.2020.9162790","DOIUrl":null,"url":null,"abstract":"We propose an automotive-grade ARM¯ Cortex¯-R4F core SoC in 28nm FD-SOI that optimizes its energy across 11X frequency-wide Operational Performance Points (OPPs) by combining Adaptive Voltage Scaling (AVS), Adaptive Body-Biasing (ABB) and Bias-in-Memory-Array (BiMA); with a 3mV/bit Tunable Replica Circuit (TRC) for safety, embedded power regulation and compensation. The reported techniques respectively improve by, 21X performance, 120mV lower VMIN , and 8X lifetime, the Low-Power, Mid-, and High-Performance OPPs. Results have been measured at extreme conditions, covering SS/TT/FF process, 0.5/1.2V, −40/150°C, and EOL aging.","PeriodicalId":252787,"journal":{"name":"2020 IEEE Symposium on VLSI Circuits","volume":"117 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI\",\"authors\":\"R. Gomez, E. Bano, A. Cathelin, S. Clerc\",\"doi\":\"10.1109/VLSICircuits18222.2020.9162790\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose an automotive-grade ARM¯ Cortex¯-R4F core SoC in 28nm FD-SOI that optimizes its energy across 11X frequency-wide Operational Performance Points (OPPs) by combining Adaptive Voltage Scaling (AVS), Adaptive Body-Biasing (ABB) and Bias-in-Memory-Array (BiMA); with a 3mV/bit Tunable Replica Circuit (TRC) for safety, embedded power regulation and compensation. The reported techniques respectively improve by, 21X performance, 120mV lower VMIN , and 8X lifetime, the Low-Power, Mid-, and High-Performance OPPs. Results have been measured at extreme conditions, covering SS/TT/FF process, 0.5/1.2V, −40/150°C, and EOL aging.\",\"PeriodicalId\":252787,\"journal\":{\"name\":\"2020 IEEE Symposium on VLSI Circuits\",\"volume\":\"117 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSICircuits18222.2020.9162790\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSICircuits18222.2020.9162790","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI
We propose an automotive-grade ARM¯ Cortex¯-R4F core SoC in 28nm FD-SOI that optimizes its energy across 11X frequency-wide Operational Performance Points (OPPs) by combining Adaptive Voltage Scaling (AVS), Adaptive Body-Biasing (ABB) and Bias-in-Memory-Array (BiMA); with a 3mV/bit Tunable Replica Circuit (TRC) for safety, embedded power regulation and compensation. The reported techniques respectively improve by, 21X performance, 120mV lower VMIN , and 8X lifetime, the Low-Power, Mid-, and High-Performance OPPs. Results have been measured at extreme conditions, covering SS/TT/FF process, 0.5/1.2V, −40/150°C, and EOL aging.
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