{"title":"用Urdhwa乘法器实现离散哈特利变换","authors":"Shirali Parsai, Swapnil Jain, Jyoti Dangi","doi":"10.1109/IBSS.2015.7456665","DOIUrl":null,"url":null,"abstract":"Discrete Hartley Transform (DHT) is one of the transform used for converting data in time domain into frequency domain using only real values. DHT can be used for highly modular and parallel processing of data in VLSI applications. We have proposed a new algorithm for calculating DHT of length 2N, where N=3 and 4. We have implemented multiplier as an improvement in place of simple multiplication used in conventional DHT. This paper gives a comparison between conventional DHT algorithm and proposed DHT algorithm in terms of delays and area.","PeriodicalId":317804,"journal":{"name":"2015 IEEE Bombay Section Symposium (IBSS)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"VHDL implementation of Discrete Hartley Transform using Urdhwa multiplier\",\"authors\":\"Shirali Parsai, Swapnil Jain, Jyoti Dangi\",\"doi\":\"10.1109/IBSS.2015.7456665\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Discrete Hartley Transform (DHT) is one of the transform used for converting data in time domain into frequency domain using only real values. DHT can be used for highly modular and parallel processing of data in VLSI applications. We have proposed a new algorithm for calculating DHT of length 2N, where N=3 and 4. We have implemented multiplier as an improvement in place of simple multiplication used in conventional DHT. This paper gives a comparison between conventional DHT algorithm and proposed DHT algorithm in terms of delays and area.\",\"PeriodicalId\":317804,\"journal\":{\"name\":\"2015 IEEE Bombay Section Symposium (IBSS)\",\"volume\":\"102 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Bombay Section Symposium (IBSS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IBSS.2015.7456665\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Bombay Section Symposium (IBSS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IBSS.2015.7456665","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
VHDL implementation of Discrete Hartley Transform using Urdhwa multiplier
Discrete Hartley Transform (DHT) is one of the transform used for converting data in time domain into frequency domain using only real values. DHT can be used for highly modular and parallel processing of data in VLSI applications. We have proposed a new algorithm for calculating DHT of length 2N, where N=3 and 4. We have implemented multiplier as an improvement in place of simple multiplication used in conventional DHT. This paper gives a comparison between conventional DHT algorithm and proposed DHT algorithm in terms of delays and area.