M. Matteis, S. D’Amico, V. Giannini, A. Baschirotto
{"title":"用于WLAN接收器的550mV 8dBm IIP3 4阶模拟基带滤波器","authors":"M. Matteis, S. D’Amico, V. Giannini, A. Baschirotto","doi":"10.1109/ESSCIRC.2007.4430352","DOIUrl":null,"url":null,"abstract":"In this paper a 4th order low-pass continuous- time filter for a WLAN receiver is presented. The filter is designed to satisfy high-linearity performance while operating at very-low supply voltage. An improved bias circuit is used to operate with different opamp input and output common-mode voltages. The filter is realized in a standard 0.13 mum CMOS technology with VTHNap250 mV and VTHPap300 mV. The filter is optimally operating with supply voltage as low as 550 mV and slightly below. The filter architecture is composed by two active Gm-RC biquadratic cells, which use a single opamp per-cell with a unity-gain-bandwidth comparable to the filter cut-off frequency. This reduces the total cell power consumption. The -3 dB frequency is at 12 MHz (for WLAN applications) and this is higher than any other low-voltage continuous-time filter. The -3 dB frequency can be adjusted by means of a digitally- controlled capacitance array. The filter total area occupancy is 0.47 mm2 and the total power consumption is 3.4 mW from a single 550 mV supply. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.","PeriodicalId":121828,"journal":{"name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"A 550mV 8dBm IIP3 4pth order analog base band filter for WLAN receivers\",\"authors\":\"M. Matteis, S. D’Amico, V. Giannini, A. Baschirotto\",\"doi\":\"10.1109/ESSCIRC.2007.4430352\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a 4th order low-pass continuous- time filter for a WLAN receiver is presented. The filter is designed to satisfy high-linearity performance while operating at very-low supply voltage. An improved bias circuit is used to operate with different opamp input and output common-mode voltages. The filter is realized in a standard 0.13 mum CMOS technology with VTHNap250 mV and VTHPap300 mV. The filter is optimally operating with supply voltage as low as 550 mV and slightly below. The filter architecture is composed by two active Gm-RC biquadratic cells, which use a single opamp per-cell with a unity-gain-bandwidth comparable to the filter cut-off frequency. This reduces the total cell power consumption. The -3 dB frequency is at 12 MHz (for WLAN applications) and this is higher than any other low-voltage continuous-time filter. The -3 dB frequency can be adjusted by means of a digitally- controlled capacitance array. The filter total area occupancy is 0.47 mm2 and the total power consumption is 3.4 mW from a single 550 mV supply. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.\",\"PeriodicalId\":121828,\"journal\":{\"name\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2007.4430352\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2007.4430352","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 550mV 8dBm IIP3 4pth order analog base band filter for WLAN receivers
In this paper a 4th order low-pass continuous- time filter for a WLAN receiver is presented. The filter is designed to satisfy high-linearity performance while operating at very-low supply voltage. An improved bias circuit is used to operate with different opamp input and output common-mode voltages. The filter is realized in a standard 0.13 mum CMOS technology with VTHNap250 mV and VTHPap300 mV. The filter is optimally operating with supply voltage as low as 550 mV and slightly below. The filter architecture is composed by two active Gm-RC biquadratic cells, which use a single opamp per-cell with a unity-gain-bandwidth comparable to the filter cut-off frequency. This reduces the total cell power consumption. The -3 dB frequency is at 12 MHz (for WLAN applications) and this is higher than any other low-voltage continuous-time filter. The -3 dB frequency can be adjusted by means of a digitally- controlled capacitance array. The filter total area occupancy is 0.47 mm2 and the total power consumption is 3.4 mW from a single 550 mV supply. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.