用于数字图像处理的存储器结构计算

Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing Pub Date : 1999-08-09 DOI:10.1109/MTDT.1999.782678

L. Roth, L. D. Coraor, D. Landis, P. T. Hulina, S. Deno

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引用次数: 5

摘要

半导体制造密度的持续改进使结合了广泛处理逻辑和高密度存储器的新型片上系统架构成为可能。这些新架构的许多功能可以根据实时数字图像处理的需求进行定制。本文以图像处理性能、灵活性、可制造性和制造成本为标准，对几种候选设计进行了评估。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Computing in memory architectures for digital image processing

Continuing improvements in semiconductor fabrication density are enabling new classes of system-on-a-chip architectures that combine extensive processing logic and high-density memory. Many of the capabilities of these new architectures can be custom tailored to the demands of real-time digital image processing. This paper evaluates several candidate designs, using the criteria of image processing performance, flexibility, manufacturability, and fabrication cost.

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Records of the 1999 IEEE International Workshop on Memory Technology, Design and Testing

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