Flash adc在100mhz范围内的性能

H. Crawley, R. Mckay, W. Meyer, E. J. Rosenberg, W. D. Thomas
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引用次数: 8

摘要

描述了在100兆样本/秒范围内对商用fadc(闪存模数转换器)性能的系统研究,该转换器可能适合用于超导超级对撞机。使用基于camac的测试台测量性能特性。所报道的FADC性能特征包括线性度、差分线性度和有效比特数。>
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance Of Flash ADCs In The 100 MHz Range
Describes a systematic study of the performance of commercially available FADCs (flash analog-to-digital converter) in the 100-megasample/s range, which might be suitable for use at the Superconducting Super Collider. Performance characteristics are measured using a CAMAC-based test bench. Among the FADC performance characteristics reported are linearity, differential linearity, and the effective number of bits. >
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