{"title":"高速环形发生器和测试数据压缩器[逻辑IC测试]","authors":"Grzegorz Mrugalski, J. Rajski, J. Tyszer","doi":"10.1109/VTEST.2003.1197633","DOIUrl":null,"url":null,"abstract":"This paper presents a new highly modular architecture of generators and compactors of test patterns. This structure has fewer levels of logic, smaller fan-out, reduced area, and operates at faster speed than external feedback LFSRs, internal feedback LFSRs, and cellular automata, all implementing the same characteristic polynomial.","PeriodicalId":292996,"journal":{"name":"Proceedings. 21st VLSI Test Symposium, 2003.","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"High speed ring generators and compactors of test data [logic IC test]\",\"authors\":\"Grzegorz Mrugalski, J. Rajski, J. Tyszer\",\"doi\":\"10.1109/VTEST.2003.1197633\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new highly modular architecture of generators and compactors of test patterns. This structure has fewer levels of logic, smaller fan-out, reduced area, and operates at faster speed than external feedback LFSRs, internal feedback LFSRs, and cellular automata, all implementing the same characteristic polynomial.\",\"PeriodicalId\":292996,\"journal\":{\"name\":\"Proceedings. 21st VLSI Test Symposium, 2003.\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-04-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 21st VLSI Test Symposium, 2003.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTEST.2003.1197633\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 21st VLSI Test Symposium, 2003.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.2003.1197633","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High speed ring generators and compactors of test data [logic IC test]
This paper presents a new highly modular architecture of generators and compactors of test patterns. This structure has fewer levels of logic, smaller fan-out, reduced area, and operates at faster speed than external feedback LFSRs, internal feedback LFSRs, and cellular automata, all implementing the same characteristic polynomial.