{"title":"一种10V神经元刺激器,采用0.18µm CMOS工艺,采用电压衣和折叠电压技术","authors":"Lee Lin, Chien-Chih Chen, K. Tang","doi":"10.1109/ISBB.2011.6107633","DOIUrl":null,"url":null,"abstract":"Biomedical implantable devices have drawn more and more attention in recent years. Extensive studies in neuroscience prove that neural stimulation techniques may cure or at least improve some diseases caused by neural abnormal discharge or disability. Two of the major challenges of implantable devices are combining a high-voltage driver and low-voltage digital control in a single chip, and accommodating large voltages in smaller feature size technology. This paper presents a new stimulator circuit structure to address these problems, using a novel folded voltage design to reduce the voltage supply from 20V to 10V, and a new floating voltage technique to solve the reliability issue. The proposed design has been fabricated and tested with TSMC 0.18µm 1P6M CMOS technology. 8000µA output current was delivered.","PeriodicalId":345164,"journal":{"name":"International Symposium on Bioelectronics and Bioinformations 2011","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 10V neuron stimulator in 0.18µm CMOS process with voltage clothing and folding voltage techniques\",\"authors\":\"Lee Lin, Chien-Chih Chen, K. Tang\",\"doi\":\"10.1109/ISBB.2011.6107633\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Biomedical implantable devices have drawn more and more attention in recent years. Extensive studies in neuroscience prove that neural stimulation techniques may cure or at least improve some diseases caused by neural abnormal discharge or disability. Two of the major challenges of implantable devices are combining a high-voltage driver and low-voltage digital control in a single chip, and accommodating large voltages in smaller feature size technology. This paper presents a new stimulator circuit structure to address these problems, using a novel folded voltage design to reduce the voltage supply from 20V to 10V, and a new floating voltage technique to solve the reliability issue. The proposed design has been fabricated and tested with TSMC 0.18µm 1P6M CMOS technology. 8000µA output current was delivered.\",\"PeriodicalId\":345164,\"journal\":{\"name\":\"International Symposium on Bioelectronics and Bioinformations 2011\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Bioelectronics and Bioinformations 2011\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISBB.2011.6107633\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Bioelectronics and Bioinformations 2011","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISBB.2011.6107633","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 10V neuron stimulator in 0.18µm CMOS process with voltage clothing and folding voltage techniques
Biomedical implantable devices have drawn more and more attention in recent years. Extensive studies in neuroscience prove that neural stimulation techniques may cure or at least improve some diseases caused by neural abnormal discharge or disability. Two of the major challenges of implantable devices are combining a high-voltage driver and low-voltage digital control in a single chip, and accommodating large voltages in smaller feature size technology. This paper presents a new stimulator circuit structure to address these problems, using a novel folded voltage design to reduce the voltage supply from 20V to 10V, and a new floating voltage technique to solve the reliability issue. The proposed design has been fabricated and tested with TSMC 0.18µm 1P6M CMOS technology. 8000µA output current was delivered.