无双积分回路的多级δ - σ调制器

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1986.1157015

Toshio Hayashi, Y. Inabe, Kuniharu Uchimura, Tadakatsu Kimura

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引用次数: 126

摘要

将描述一个使用两个交错单积分环路的δ - σ调制器，该调制器可将量化噪声降低20dB。该技术避免了双积分回路的不稳定性，并证明了14b分辨率。1.5μm CMOS IC工作在单个5V电源上。

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A multistage delta-sigma modulator without double integration loop

A delta-sigma modulator using two interleaved single integration loops to reduce quantization noise by 20dB will be described. The technique avoids the instability of a double integration loop and demonstrates 14b resolution. A 1.5μm CMOS IC operates from a single 5V supply.

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来源期刊

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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