用于低成本倒装芯片组装的下填充封装料的压缩流建模

N. W. Pascarella, D. Baldwin
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引用次数: 18

摘要

目前,下填料的分配处理是通过毛细管作用来实现的,这使得它成为一个昂贵且耗时的过程,特别是当设备尺寸增大和间隙减小时。作为佐治亚理工学院低成本下一代倒装芯片加工项目的一部分,一种先进的倒装芯片组装工艺正在开发中。该工艺消除了耗时的毛细管流动处理的需要,并集成了焊料互连和聚合物衬底的同时回流和固化。先进的工艺大大降低了装配成本,减少了生产时间。通过下填料的压缩流动,减少了生产时间和成本。由于材料的流动决定了装配的良率和可靠性,因此本研究的重点是放置过程的流动模拟研究。本文采用模拟方法和模拟研究方法,对下填体的压缩流动进行了表征,并对空洞的形成进行了预测。研究结果提供了设计指南,可以深入了解工艺参数,如底填体沉积几何形状和底填体粘度的限制。结果表明了压缩流芯片放置的整个过程窗口的初始限制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Compression flow modeling of underfill encapsulants for low cost flip chip assembly
Currently, underfill dispense processing is achieved through capillary action, making it a costly and time consuming process particularly as device size increases and standoff gaps decrease. As part of the Low Cost Next Generation Flip Chip Processing Program at Georgia Tech, an advanced flip chip assembly process is being developed. This process eliminates the need for time consuming capillary flow processing, and integrates the simultaneous reflow and cure of the solder interconnect and polymer underfill. The advanced process results in a significantly lower assembly cost combined with reduced throughput time. Reduced throughput time and cost are achieved through the compression flow of the underfill material. Since the flow of the material governs assembly yield and reliability, this work focused on flow simulation studies of the placement process. Here a simulation methodology and simulation studies were conducted to characterize the compression flow of the underfill and predict void formation. Results yielded design guidelines that gave insight into process parameters such as the limits on underfill deposition geometry and underfill viscosity. The results indicated the initial limits of an overall process window for compression flow chip placement.
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