{"title":"用于低成本倒装芯片组装的下填充封装料的压缩流建模","authors":"N. W. Pascarella, D. Baldwin","doi":"10.1109/ISAPM.1998.664430","DOIUrl":null,"url":null,"abstract":"Currently, underfill dispense processing is achieved through capillary action, making it a costly and time consuming process particularly as device size increases and standoff gaps decrease. As part of the Low Cost Next Generation Flip Chip Processing Program at Georgia Tech, an advanced flip chip assembly process is being developed. This process eliminates the need for time consuming capillary flow processing, and integrates the simultaneous reflow and cure of the solder interconnect and polymer underfill. The advanced process results in a significantly lower assembly cost combined with reduced throughput time. Reduced throughput time and cost are achieved through the compression flow of the underfill material. Since the flow of the material governs assembly yield and reliability, this work focused on flow simulation studies of the placement process. Here a simulation methodology and simulation studies were conducted to characterize the compression flow of the underfill and predict void formation. Results yielded design guidelines that gave insight into process parameters such as the limits on underfill deposition geometry and underfill viscosity. The results indicated the initial limits of an overall process window for compression flow chip placement.","PeriodicalId":354229,"journal":{"name":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"Compression flow modeling of underfill encapsulants for low cost flip chip assembly\",\"authors\":\"N. W. Pascarella, D. Baldwin\",\"doi\":\"10.1109/ISAPM.1998.664430\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Currently, underfill dispense processing is achieved through capillary action, making it a costly and time consuming process particularly as device size increases and standoff gaps decrease. As part of the Low Cost Next Generation Flip Chip Processing Program at Georgia Tech, an advanced flip chip assembly process is being developed. This process eliminates the need for time consuming capillary flow processing, and integrates the simultaneous reflow and cure of the solder interconnect and polymer underfill. The advanced process results in a significantly lower assembly cost combined with reduced throughput time. Reduced throughput time and cost are achieved through the compression flow of the underfill material. Since the flow of the material governs assembly yield and reliability, this work focused on flow simulation studies of the placement process. Here a simulation methodology and simulation studies were conducted to characterize the compression flow of the underfill and predict void formation. Results yielded design guidelines that gave insight into process parameters such as the limits on underfill deposition geometry and underfill viscosity. The results indicated the initial limits of an overall process window for compression flow chip placement.\",\"PeriodicalId\":354229,\"journal\":{\"name\":\"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISAPM.1998.664430\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 4th International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces (Cat. No.98EX153)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISAPM.1998.664430","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Compression flow modeling of underfill encapsulants for low cost flip chip assembly
Currently, underfill dispense processing is achieved through capillary action, making it a costly and time consuming process particularly as device size increases and standoff gaps decrease. As part of the Low Cost Next Generation Flip Chip Processing Program at Georgia Tech, an advanced flip chip assembly process is being developed. This process eliminates the need for time consuming capillary flow processing, and integrates the simultaneous reflow and cure of the solder interconnect and polymer underfill. The advanced process results in a significantly lower assembly cost combined with reduced throughput time. Reduced throughput time and cost are achieved through the compression flow of the underfill material. Since the flow of the material governs assembly yield and reliability, this work focused on flow simulation studies of the placement process. Here a simulation methodology and simulation studies were conducted to characterize the compression flow of the underfill and predict void formation. Results yielded design guidelines that gave insight into process parameters such as the limits on underfill deposition geometry and underfill viscosity. The results indicated the initial limits of an overall process window for compression flow chip placement.