{"title":"6H-SiC MOS器件的工艺技术及高温性能","authors":"U. Schmid, W. Wondrak","doi":"10.1109/HITEN.1999.827495","DOIUrl":null,"url":null,"abstract":"In this article, processing and characterization of 6H-SiC MOS devices is described. We start with gate controlled diode measurements determining the thermally grown oxide quality, describe the high temperature behavior of single enhancement-mode MOSFETs and present the static transfer characteristic of a monolithic differential amplifier. The gate oxides are investigated after five different contact anneal temperatures between 900/spl deg/C and 1150/spl deg/C. Contact annealing temperatures between 900/spl deg/C and 1050/spl deg/C cause only a slight increase in N/sub it/ from 1.0/spl middot/10/sup 12/ cm/sup -2/ to 1.6/spl middot/10/sup -2/ cm/sup -2/. Leakage currents in the pre-tunneling region are very low and amount to about 4/spl middot/10/sup -9/ A/cm/sup 2/. Threshold implantations enable the realization of depletion- and enhancement-mode devices on the same wafer. This technology proves to be suited for the fabrication of integrated circuits.","PeriodicalId":297771,"journal":{"name":"HITEN 99. Third European Conference on High Temperature Electronics. (IEEE Cat. No.99EX372)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Process technology and high temperature performance of 6H-SiC MOS devices\",\"authors\":\"U. Schmid, W. Wondrak\",\"doi\":\"10.1109/HITEN.1999.827495\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this article, processing and characterization of 6H-SiC MOS devices is described. We start with gate controlled diode measurements determining the thermally grown oxide quality, describe the high temperature behavior of single enhancement-mode MOSFETs and present the static transfer characteristic of a monolithic differential amplifier. The gate oxides are investigated after five different contact anneal temperatures between 900/spl deg/C and 1150/spl deg/C. Contact annealing temperatures between 900/spl deg/C and 1050/spl deg/C cause only a slight increase in N/sub it/ from 1.0/spl middot/10/sup 12/ cm/sup -2/ to 1.6/spl middot/10/sup -2/ cm/sup -2/. Leakage currents in the pre-tunneling region are very low and amount to about 4/spl middot/10/sup -9/ A/cm/sup 2/. Threshold implantations enable the realization of depletion- and enhancement-mode devices on the same wafer. This technology proves to be suited for the fabrication of integrated circuits.\",\"PeriodicalId\":297771,\"journal\":{\"name\":\"HITEN 99. Third European Conference on High Temperature Electronics. (IEEE Cat. No.99EX372)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-07-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"HITEN 99. Third European Conference on High Temperature Electronics. (IEEE Cat. No.99EX372)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HITEN.1999.827495\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"HITEN 99. Third European Conference on High Temperature Electronics. (IEEE Cat. No.99EX372)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HITEN.1999.827495","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Process technology and high temperature performance of 6H-SiC MOS devices
In this article, processing and characterization of 6H-SiC MOS devices is described. We start with gate controlled diode measurements determining the thermally grown oxide quality, describe the high temperature behavior of single enhancement-mode MOSFETs and present the static transfer characteristic of a monolithic differential amplifier. The gate oxides are investigated after five different contact anneal temperatures between 900/spl deg/C and 1150/spl deg/C. Contact annealing temperatures between 900/spl deg/C and 1050/spl deg/C cause only a slight increase in N/sub it/ from 1.0/spl middot/10/sup 12/ cm/sup -2/ to 1.6/spl middot/10/sup -2/ cm/sup -2/. Leakage currents in the pre-tunneling region are very low and amount to about 4/spl middot/10/sup -9/ A/cm/sup 2/. Threshold implantations enable the realization of depletion- and enhancement-mode devices on the same wafer. This technology proves to be suited for the fabrication of integrated circuits.