{"title":"一种低噪声CMOS差分放大器的新结构","authors":"Wei Lan, Gao Jim, Chen Zhongjian, Ji Lijiu","doi":"10.1109/ICASIC.2005.1611337","DOIUrl":null,"url":null,"abstract":"A new structure of low-noise CMOS differential amplifier has been presented in this paper. The structure is mainly based on a load of common-gate MOSFETs with resistances in series at sources (CG-R load), which does not increase complication of the circuit. This structure decreases 1/f noise of the load by a (1 + g/sub m2/R) /sup 2/ coefficient, while keeps the voltage gain high. The simulation result for the given example reveals an average reduction of 90% for load noise at low frequencies, compared with current-mirror load (CM load).","PeriodicalId":431034,"journal":{"name":"2005 6th International Conference on ASIC","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A new structure of low-noise CMOS differential amplifier\",\"authors\":\"Wei Lan, Gao Jim, Chen Zhongjian, Ji Lijiu\",\"doi\":\"10.1109/ICASIC.2005.1611337\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new structure of low-noise CMOS differential amplifier has been presented in this paper. The structure is mainly based on a load of common-gate MOSFETs with resistances in series at sources (CG-R load), which does not increase complication of the circuit. This structure decreases 1/f noise of the load by a (1 + g/sub m2/R) /sup 2/ coefficient, while keeps the voltage gain high. The simulation result for the given example reveals an average reduction of 90% for load noise at low frequencies, compared with current-mirror load (CM load).\",\"PeriodicalId\":431034,\"journal\":{\"name\":\"2005 6th International Conference on ASIC\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 6th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICASIC.2005.1611337\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 6th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2005.1611337","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new structure of low-noise CMOS differential amplifier
A new structure of low-noise CMOS differential amplifier has been presented in this paper. The structure is mainly based on a load of common-gate MOSFETs with resistances in series at sources (CG-R load), which does not increase complication of the circuit. This structure decreases 1/f noise of the load by a (1 + g/sub m2/R) /sup 2/ coefficient, while keeps the voltage gain high. The simulation result for the given example reveals an average reduction of 90% for load noise at low frequencies, compared with current-mirror load (CM load).