8b 350MHz闪存ADC

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1987.1157115

Y. Yoshii, M. Nakamura, K. Hirasawa, A. Kayanuma, K. Asano

{"title":"8b 350MHz闪存ADC","authors":"Y. Yoshii, M. Nakamura, K. Hirasawa, A. Kayanuma, K. Asano","doi":"10.1109/ISSCC.1987.1157115","DOIUrl":null,"url":null,"abstract":"A circuit technology and a self-aligned emitter process with poly-Si base contact, affording 350MHz conversion with power consumption of 1.5W, will be reported. A flash A/D conversion technique with error and nonlinearity suppression provides a 41.5dB SNR for a 30MHz input signal. The chip measures 3.16×82mm, with 14,000 components.","PeriodicalId":102932,"journal":{"name":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"An 8b 350MHz flash ADC\",\"authors\":\"Y. Yoshii, M. Nakamura, K. Hirasawa, A. Kayanuma, K. Asano\",\"doi\":\"10.1109/ISSCC.1987.1157115\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A circuit technology and a self-aligned emitter process with poly-Si base contact, affording 350MHz conversion with power consumption of 1.5W, will be reported. A flash A/D conversion technique with error and nonlinearity suppression provides a 41.5dB SNR for a 30MHz input signal. The chip measures 3.16×82mm, with 14,000 components.\",\"PeriodicalId\":102932,\"journal\":{\"name\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1987.1157115\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1987.1157115","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 7

摘要

将报道一种电路技术和具有多晶硅基极接触的自对准发射极工艺，提供350MHz转换，功耗为1.5W。具有误差和非线性抑制的闪存A/D转换技术为30MHz输入信号提供了41.5dB的信噪比。该芯片尺寸为3.16×82mm，包含14000个组件。

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An 8b 350MHz flash ADC

A circuit technology and a self-aligned emitter process with poly-Si base contact, affording 350MHz conversion with power consumption of 1.5W, will be reported. A flash A/D conversion technique with error and nonlinearity suppression provides a 41.5dB SNR for a 30MHz input signal. The chip measures 3.16×82mm, with 14,000 components.

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来源期刊

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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