{"title":"利用亚阈值ota的250mV 77dB DR 10kHz BW SC ΔΣ调制器","authors":"Zhiliang Qiao, Xiong Zhou, Qiang Li","doi":"10.1109/ESSCIRC.2014.6942111","DOIUrl":null,"url":null,"abstract":"This paper presents a high-resolution ΔΣ modulator which is capable of operation under supply voltage as low as 250mV. A novel subthreshold inverter-based OTA is proposed and exploited in the switched-capacitor (SC) integrators, permitting a satisfied noise-shaping performance in the 4th-order feed-forward topology. With each stage's coefficient optimized, the integrators' internal swings and the distortion power stemming from OTAs' gain nonlinearity are minimized. Implemented in a 0.13μm CMOS with an OSR of 64 and a sampling frequency (fs) of 1.28MHz, this design achieves a measured DR of 77.0dB, SNDR of 73.3dB, and SFDR of 85.0dB over a 10kHz bandwidth. To the best of authors' knowledge, it appears to be the converter with highest SNDR observed among sub -0.5V designs.","PeriodicalId":202377,"journal":{"name":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"A 250mV 77dB DR 10kHz BW SC ΔΣ Modulator Exploiting Subthreshold OTAs\",\"authors\":\"Zhiliang Qiao, Xiong Zhou, Qiang Li\",\"doi\":\"10.1109/ESSCIRC.2014.6942111\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a high-resolution ΔΣ modulator which is capable of operation under supply voltage as low as 250mV. A novel subthreshold inverter-based OTA is proposed and exploited in the switched-capacitor (SC) integrators, permitting a satisfied noise-shaping performance in the 4th-order feed-forward topology. With each stage's coefficient optimized, the integrators' internal swings and the distortion power stemming from OTAs' gain nonlinearity are minimized. Implemented in a 0.13μm CMOS with an OSR of 64 and a sampling frequency (fs) of 1.28MHz, this design achieves a measured DR of 77.0dB, SNDR of 73.3dB, and SFDR of 85.0dB over a 10kHz bandwidth. To the best of authors' knowledge, it appears to be the converter with highest SNDR observed among sub -0.5V designs.\",\"PeriodicalId\":202377,\"journal\":{\"name\":\"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2014.6942111\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2014.6942111","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 250mV 77dB DR 10kHz BW SC ΔΣ Modulator Exploiting Subthreshold OTAs
This paper presents a high-resolution ΔΣ modulator which is capable of operation under supply voltage as low as 250mV. A novel subthreshold inverter-based OTA is proposed and exploited in the switched-capacitor (SC) integrators, permitting a satisfied noise-shaping performance in the 4th-order feed-forward topology. With each stage's coefficient optimized, the integrators' internal swings and the distortion power stemming from OTAs' gain nonlinearity are minimized. Implemented in a 0.13μm CMOS with an OSR of 64 and a sampling frequency (fs) of 1.28MHz, this design achieves a measured DR of 77.0dB, SNDR of 73.3dB, and SFDR of 85.0dB over a 10kHz bandwidth. To the best of authors' knowledge, it appears to be the converter with highest SNDR observed among sub -0.5V designs.
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