快速拥塞感知路由引脚分配

S. Prasad
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引用次数: 2

摘要

在典型的自顶向下分层物理设计中,Macroblock(又名分区)引脚分配和路由是重要的任务。路由器使用引脚位置作为连接点,以最小化拥塞为目标进行路由设计。然而,确定合适的引脚位置本身取决于作为种子输入的无拥塞路由拓扑的可用性。这就导致了一个进退两难的局面。在本文中,我们提出了一种方法,在原型阶段,生成快速和肮脏的无拥塞路由拓扑,在顶部通道。这是真正的芯片路由拓扑,从某种意义上说,每个网络的路由拓扑都遵循物理层次结构,就像分层实现期间发生的那样。这将作为种子传递给引脚分配引擎,从而产生无拥塞的引脚位置。该方法的新颖之处在于它能有效地检测出那些路由拓扑与顶部信道拥塞关系很小或没有关系的分区间网络。然后,这些网络要么不路由,要么以不知道层次结构的方式快速路由。我们将证明这种路由拓扑足够好(小于10%的误差范围),可以在分区边界上建立合适的交叉点,而与以层次感知方式路由所有网络相比,实现的速度提高了约6倍。实验结果证明了该方法的有效性。此外,它还可以有效地用作决策的种子输入,例如分区之间的通道大小和分区的预算时间约束。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fast Congestion Aware Routing for Pin Assignment
Macroblock (aka partition) pin assignment and routing are important tasks in typical top-down hierarchical physical design. Routers use pin locations as connection points to route the design with a goal of minimizing congestion. However, determining suitable pin locations it self depends on availability of congestion free routing topology as a seed input. This results in a catch-22 situation. In this paper, we present an approach, during prototyping phase, to generate fast-and- dirty congestion free routing topology, in top channels. This is real chip routing topology, in the sense that, the routing topology of every net adheres to physical hierarchy, as would happen during hierarchical implementation. This is passed as seed to pin assignment engine, which thus, results in congestion-free pin locations. The novelty of this approach lies in efficient detection of those inter-partition nets whose routing topology have little or no bearing to top channel congestion. These nets are then either not routed or routed in a fast hierarchy unaware manner. We will show that this routing topology is good enough (less than 10% error margin) to establish suitable cross points at partition boundaries, while the speed up achieved is around 6X compared to routing all nets in hierarchy aware manner. Experimental results demonstrate its efficiency and effectiveness. Furthermore, it can also be effectively used as seed input for decisions like channel sizing between partitions, and budgeting timing constraints to partitions.
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