{"title":"利用SIMD指令的H.264解码器优化","authors":"Juyup Lee, Sungkun Moon, Wonyong Sung","doi":"10.1109/APCCAS.2004.1413088","DOIUrl":null,"url":null,"abstract":"In this paper, H.264/AVC, the newest video coding standard, baseline profile decoder was implemented exploiting Intel MMX instructions. Both control- and data-level parallel processing approaches'were applied to the kernels of the baseline subsystems for efficiently utilizing the SIMD (Single Instruction Multiple Data) instructions. The data-level parallel approach tries to process multiple pixels at a time to fully utilize SIMD instructions. The data-level approach shows a better performance even though loop unrolling is further applied to the conlrol-level approach. The resultant implementations are also compared with the Intel Performance Primitives.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"H.264 decoder optimization exploiting SIMD instructions\",\"authors\":\"Juyup Lee, Sungkun Moon, Wonyong Sung\",\"doi\":\"10.1109/APCCAS.2004.1413088\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, H.264/AVC, the newest video coding standard, baseline profile decoder was implemented exploiting Intel MMX instructions. Both control- and data-level parallel processing approaches'were applied to the kernels of the baseline subsystems for efficiently utilizing the SIMD (Single Instruction Multiple Data) instructions. The data-level parallel approach tries to process multiple pixels at a time to fully utilize SIMD instructions. The data-level approach shows a better performance even though loop unrolling is further applied to the conlrol-level approach. The resultant implementations are also compared with the Intel Performance Primitives.\",\"PeriodicalId\":426683,\"journal\":{\"name\":\"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-12-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS.2004.1413088\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2004.1413088","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper, H.264/AVC, the newest video coding standard, baseline profile decoder was implemented exploiting Intel MMX instructions. Both control- and data-level parallel processing approaches'were applied to the kernels of the baseline subsystems for efficiently utilizing the SIMD (Single Instruction Multiple Data) instructions. The data-level parallel approach tries to process multiple pixels at a time to fully utilize SIMD instructions. The data-level approach shows a better performance even though loop unrolling is further applied to the conlrol-level approach. The resultant implementations are also compared with the Intel Performance Primitives.