Variable Fast Transient Digitizer

A low cost, low power substitute for expensive, high power high-speed analog-to-digital converters (ADCs) in some situations is presented. This circuit is called a variable fast transient digitizer (VFTD). This paper provides an overview of the design and measured test results. The VFTD is designed to sample a high-speed analog input signal and later reconstruct the captured signal at a much slower rate, for example, around three orders of magnitude. This approach eliminates quantization error in the captured signal. Further, this approach enables the use of slow, low cost, analog-to-digital converters such as those found in microcontrollers. The VFTD discussed in this paper uses 256 sequential sample and hold cells with a process dependent variable delay element controlled by an off-chip voltage source. Using a power supply voltage of 5V the input range extends from 0 V to 3 V corresponding to an output voltage range from 2 V to 5 V, a capture window range from 81 ns to 1.78 µs, and a sampling rate range from 143.82 MS/s to 3.16 GS/s. The VFTD is fabricated on a 2 mm x 2 mm die using ON Semiconductor's 0.5 µm C5 process and requires a 0.5 mm x 1.5 mm area.