{"title":"一种测量微处理器电源阻抗的方法","authors":"G. Taylor, C. Deutschle, T. Arabi, B. Owens","doi":"10.1109/EPEP.2001.967648","DOIUrl":null,"url":null,"abstract":"A technique to calculate the relative on die power supply impedance of high power CMOS integrated circuits as a function of frequency is described. This approach uses the power supply current variation that is normally present in a microprocessor to stimulate the supply network, varying the clock rate of the processor in order to obtain multiple measurements. Using this technique the power supply impedance vs. frequency of a 0.18 /spl mu/m microprocessor was measured and compared to a simple lumped circuit model.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"An approach to measuring power supply impedance of microprocessors\",\"authors\":\"G. Taylor, C. Deutschle, T. Arabi, B. Owens\",\"doi\":\"10.1109/EPEP.2001.967648\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A technique to calculate the relative on die power supply impedance of high power CMOS integrated circuits as a function of frequency is described. This approach uses the power supply current variation that is normally present in a microprocessor to stimulate the supply network, varying the clock rate of the processor in order to obtain multiple measurements. Using this technique the power supply impedance vs. frequency of a 0.18 /spl mu/m microprocessor was measured and compared to a simple lumped circuit model.\",\"PeriodicalId\":174339,\"journal\":{\"name\":\"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-10-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.2001.967648\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2001.967648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An approach to measuring power supply impedance of microprocessors
A technique to calculate the relative on die power supply impedance of high power CMOS integrated circuits as a function of frequency is described. This approach uses the power supply current variation that is normally present in a microprocessor to stimulate the supply network, varying the clock rate of the processor in order to obtain multiple measurements. Using this technique the power supply impedance vs. frequency of a 0.18 /spl mu/m microprocessor was measured and compared to a simple lumped circuit model.