Ali Khaki-Firooz, K. Cheng, Qing Liu, T. Nagumo, N. Loubet, A. Reznicek, J. Kuss, J. Gimbert, R. Sreenivasan, M. Vinet, L. Grenouillet, Y. L. Tiec, R. Wacquez, Z. Ren, J. Cai, D. Shahrjerdi, P. Kulkarni, S. Ponoth, S. Luning, B. Doris
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Extremely thin SOI for system-on-chip applications
We review the basics of the extremely thin SOI (ETSOI) technology and how it addresses the main challenges of the CMOS scaling at the 20-nm technology node and beyond. The possibility of VT tuning with backbias, while keeping the channel undoped, opens up new opportunities that are unique to ETSOI. The main device characteristics with regard to low-power and high-performance logic, SRAM, analog and passive devices, and embedded memory are reviewed.
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