{"title":"用相位配置SPWM技术降低二极管箝位MLI共模电压","authors":"Mohd Esa, J. E. Muralidhar","doi":"10.1109/ICEES.2018.8442411","DOIUrl":null,"url":null,"abstract":"The aim of this paper is to reduce the Common Mode Voltage (CMV) in the Diode Clamped Multilevel Inverter (DCMLI). Three phase star connected RL load is connected to DCMLI. The common mode voltage exists between star point of load & system ground. Premature failure of bearings of Induction Motor (IM) is caused by CMV and is necessary to reduce. In this paper, Phase Disposition Sinusoidal Pulse Width Modulation (PD SPWM) technique is used for reduction of CMV and LC filter is used for reduction of Harmonics. MATLAB Simulink is used for the simulation of circuit. Total Harmonic Distortion (THD) and CMV are investigated.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Common Mode Voltage reduction in Diode Clamped MLI using Phase Disposition SPWM Technique\",\"authors\":\"Mohd Esa, J. E. Muralidhar\",\"doi\":\"10.1109/ICEES.2018.8442411\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The aim of this paper is to reduce the Common Mode Voltage (CMV) in the Diode Clamped Multilevel Inverter (DCMLI). Three phase star connected RL load is connected to DCMLI. The common mode voltage exists between star point of load & system ground. Premature failure of bearings of Induction Motor (IM) is caused by CMV and is necessary to reduce. In this paper, Phase Disposition Sinusoidal Pulse Width Modulation (PD SPWM) technique is used for reduction of CMV and LC filter is used for reduction of Harmonics. MATLAB Simulink is used for the simulation of circuit. Total Harmonic Distortion (THD) and CMV are investigated.\",\"PeriodicalId\":134828,\"journal\":{\"name\":\"2018 4th International Conference on Electrical Energy Systems (ICEES)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 4th International Conference on Electrical Energy Systems (ICEES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEES.2018.8442411\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 4th International Conference on Electrical Energy Systems (ICEES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEES.2018.8442411","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Common Mode Voltage reduction in Diode Clamped MLI using Phase Disposition SPWM Technique
The aim of this paper is to reduce the Common Mode Voltage (CMV) in the Diode Clamped Multilevel Inverter (DCMLI). Three phase star connected RL load is connected to DCMLI. The common mode voltage exists between star point of load & system ground. Premature failure of bearings of Induction Motor (IM) is caused by CMV and is necessary to reduce. In this paper, Phase Disposition Sinusoidal Pulse Width Modulation (PD SPWM) technique is used for reduction of CMV and LC filter is used for reduction of Harmonics. MATLAB Simulink is used for the simulation of circuit. Total Harmonic Distortion (THD) and CMV are investigated.
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