基于Xilinx Kintex-7 FPGA的三模冗余SEU缓解技术评估的实验方法和结果

2017 IEEE Radiation Effects Data Workshop (REDW) Pub Date : 2017-07-01 DOI:10.1109/NSREC.2017.8115451

K. Sielewicz, G. Rinella, M. Bonora, P. Giubilato, M. Lupi, M. Rossewij, J. Schambach, T. Vanat

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引用次数: 15

摘要

本文介绍了基于Xilinx Kintex-7 FPGA的三模冗余SEU缓解技术评估的实验方法和结果。在质子辐照和断层注入试验中进行了测试。

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Experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA

This paper describes experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA. Testing was performed both in proton irradiation and fault injection tests.

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2017 IEEE Radiation Effects Data Workshop (REDW)

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