J. Ecrabey, L. Hébrard, C. Klingeihofer, F. Gaffiot, G. Jacquemod, J. Berger-Toussan, M. Le Helley
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Experimental validation of electrothermal simulations using SETIPIC for analogue integrated circuits
This paper presents the validation of SETIPIC-an electrothermal simulator for power integrated circuits. SETIPIC works by alternation of electrical simulations, using a SPICE-like simulator and thermal simulations using PICMOST-a three-dimensional thermal simulator we wrote to obtain the thermal distribution on the layout surface in a transient or stationary mode. Also, an infrared thermal measurement experimental set up was built to validate SETIPIC on an industrial IC and some thermal results are given.