一种集成有源缓冲器的中功率SiC模块,可实现最低开关损耗

M. Schlüter, A. Uhlemann, M. Pfost
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引用次数: 1

摘要

更好的电磁干扰性能和更低的开关损耗是电力电子学的重要目标。近年来,宽带隙材料成为研究的主题,提供更快的开关速度,从而降低开关损耗。然而,由于杂散电感和寄生电容,快速晶体管容易产生振荡。此外,高杂散电感导致关断时的高电压超调。由于这些原因,小的杂散电感对于低电磁干扰和低开关损耗至关重要。在电力电子系统的开发过程中,一个主要的困难是杂散电感分布在几个部分上,例如直流链路电容器、连接和电源模块。因此,实现低杂散电感是具有挑战性的。为了减轻这种情况,使用缓冲电路,然而,这可能导致更高的总损耗。本文提出了一种集成有源缓冲器的中功率SiC-MOSFET模块,该模块利用了杂散电感中的能量。并与标准半桥和集成直流缓冲器的半桥进行了比较。这三种拓扑在相同的设置中测试了在600V和350A下的硬开关操作,它们都具有相似的DBC布局。结果表明,由于有源缓冲器,电压超调、振荡倾向和系统损耗都大大降低。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Medium Power SiC Module with Integrated Active Snubber for Lowest Switching Losses
Better EMI performance and lower switching losses are important goals in power electronics. Since several years, wide-bandgap materials are subject of research, providing faster switching speeds and thus lower switching losses. However, fast transistors tend to oscillate due to stray inductance and parasitic capacitances. Furthermore, a high stray inductance leads to a high voltage overshoot at turn-off. For those reasons, a small stray inductance is essential for low EMI and low switching losses. A major difficulty during the development of a power electronic system is that the stray inductance is distributed over several parts, e.g. the DC-link capacitor, the connection, and the power module. Thus, achieving a low stray inductance is challenging. To alleviate that is the use of a snubber circuit, which, however, may lead to even higher overall losses. In this paper, a medium power SiC-MOSFET module is presented with an integrated active snubber that makes use of the energy in the stray inductance. It is compared with two other topologies, a standard halfbridge and a halfbridge with integrated DC snubber. The three topologies are tested in identical setups for hard-switching operation at 600V and 350A, all with similar DBC layout. It is shown that the voltage overshoot, the tendency to oscillate, and the system losses are strongly decreased due to the active snubber.
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