{"title":"一个200 MHz 9分路模拟均衡器,用于0.6 /spl mu/m CMOS的磁盘读通道","authors":"Danfeng Xu, Yonghua Song, G. T. Uehara","doi":"10.1109/ISSCC.1996.488520","DOIUrl":null,"url":null,"abstract":"This paper describes an analog discrete-time equalizer that uses switched-capacitor (SC) filtering capable of achieving speeds higher than can otherwise be attained using conventional opamp techniques. The approach employs parallelism and exclusive use of open-loop circuitry in the signal path. Conventional SC filters require technologies with high-quality capacitors to create accurate ratios. The approach eliminates high-quality capacitors in the signal path and is amenable to digital CMOS processes.","PeriodicalId":162539,"journal":{"name":"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-02-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":"{\"title\":\"A 200 MHz 9-tap analog equalizer for magnetic disk read channels in 0.6 /spl mu/m CMOS\",\"authors\":\"Danfeng Xu, Yonghua Song, G. T. Uehara\",\"doi\":\"10.1109/ISSCC.1996.488520\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes an analog discrete-time equalizer that uses switched-capacitor (SC) filtering capable of achieving speeds higher than can otherwise be attained using conventional opamp techniques. The approach employs parallelism and exclusive use of open-loop circuitry in the signal path. Conventional SC filters require technologies with high-quality capacitors to create accurate ratios. The approach eliminates high-quality capacitors in the signal path and is amenable to digital CMOS processes.\",\"PeriodicalId\":162539,\"journal\":{\"name\":\"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-02-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"26\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1996.488520\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1996.488520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 200 MHz 9-tap analog equalizer for magnetic disk read channels in 0.6 /spl mu/m CMOS
This paper describes an analog discrete-time equalizer that uses switched-capacitor (SC) filtering capable of achieving speeds higher than can otherwise be attained using conventional opamp techniques. The approach employs parallelism and exclusive use of open-loop circuitry in the signal path. Conventional SC filters require technologies with high-quality capacitors to create accurate ratios. The approach eliminates high-quality capacitors in the signal path and is amenable to digital CMOS processes.