K. Itoh, R. Hori, H. Masuda, Y. Kamigaki, H. Kawamoto, H. Katto
{"title":"单个5V 64K动态RAM","authors":"K. Itoh, R. Hori, H. Masuda, Y. Kamigaki, H. Kawamoto, H. Katto","doi":"10.1109/ISSCC.1980.1156076","DOIUrl":null,"url":null,"abstract":"This paper will report on a single 5V, 64K dynamic RAM with a substrate-bias generator, typical power dissipation of 170mW at 300ns cycle time, access time of 120ns and 25.8mm2chip area.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"34","resultStr":"{\"title\":\"A single 5V 64K dynamic RAM\",\"authors\":\"K. Itoh, R. Hori, H. Masuda, Y. Kamigaki, H. Kawamoto, H. Katto\",\"doi\":\"10.1109/ISSCC.1980.1156076\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper will report on a single 5V, 64K dynamic RAM with a substrate-bias generator, typical power dissipation of 170mW at 300ns cycle time, access time of 120ns and 25.8mm2chip area.\",\"PeriodicalId\":229101,\"journal\":{\"name\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"34\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1980.1156076\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1980.1156076","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper will report on a single 5V, 64K dynamic RAM with a substrate-bias generator, typical power dissipation of 170mW at 300ns cycle time, access time of 120ns and 25.8mm2chip area.