{"title":"持续改进过程的研究:实施一种优化的洗涤器来取代TEOS背面蚀刻后SOG蚀刻","authors":"W. Au, D. Parks, P. Esquivel","doi":"10.1109/ASMC.1998.731574","DOIUrl":null,"url":null,"abstract":"As device features become smaller and manufacturing processes get more complicated, exploration of ways to reduce the number of process steps is gaining serious attention. This allows the manufacturing company to remain competitive within the semiconductor industry. This paper describes a continuous improvement process through the implementation of a scrubber post SOG etchback to remove TEOS backside etch. As the particle level of the wafer backside increases after SOG etchback, TEOS backside etch was done to clean the wafer backside to minimize focusing error in subsequent photolithography steps. The module involves resist coating of the wafer front side, a buffer HF oxide etch, followed by the resist ash and strip. Replacing the entire module with a backside scrub offers significant chemical cost savings, process cycle time reduction and increased sink, coater and asher capacity. Detailed descriptions of the old and new process and a comparison of particle and yield data are presented. Overall improvement in the manufacturing process is demonstrated by measures of cycle time, chemical cost, personnel efficiency, reduction in equipment purchases, and fab capacity.","PeriodicalId":290016,"journal":{"name":"IEEE/SEMI 1998 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (Cat. No.98CH36168)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A study in the continuous improvement process: implementation of an optimized scrubber to replace TEOS backside etch post SOG etchback\",\"authors\":\"W. Au, D. Parks, P. Esquivel\",\"doi\":\"10.1109/ASMC.1998.731574\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As device features become smaller and manufacturing processes get more complicated, exploration of ways to reduce the number of process steps is gaining serious attention. This allows the manufacturing company to remain competitive within the semiconductor industry. This paper describes a continuous improvement process through the implementation of a scrubber post SOG etchback to remove TEOS backside etch. As the particle level of the wafer backside increases after SOG etchback, TEOS backside etch was done to clean the wafer backside to minimize focusing error in subsequent photolithography steps. The module involves resist coating of the wafer front side, a buffer HF oxide etch, followed by the resist ash and strip. Replacing the entire module with a backside scrub offers significant chemical cost savings, process cycle time reduction and increased sink, coater and asher capacity. Detailed descriptions of the old and new process and a comparison of particle and yield data are presented. Overall improvement in the manufacturing process is demonstrated by measures of cycle time, chemical cost, personnel efficiency, reduction in equipment purchases, and fab capacity.\",\"PeriodicalId\":290016,\"journal\":{\"name\":\"IEEE/SEMI 1998 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (Cat. No.98CH36168)\",\"volume\":\"115 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-09-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE/SEMI 1998 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (Cat. No.98CH36168)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASMC.1998.731574\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE/SEMI 1998 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop (Cat. No.98CH36168)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASMC.1998.731574","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A study in the continuous improvement process: implementation of an optimized scrubber to replace TEOS backside etch post SOG etchback
As device features become smaller and manufacturing processes get more complicated, exploration of ways to reduce the number of process steps is gaining serious attention. This allows the manufacturing company to remain competitive within the semiconductor industry. This paper describes a continuous improvement process through the implementation of a scrubber post SOG etchback to remove TEOS backside etch. As the particle level of the wafer backside increases after SOG etchback, TEOS backside etch was done to clean the wafer backside to minimize focusing error in subsequent photolithography steps. The module involves resist coating of the wafer front side, a buffer HF oxide etch, followed by the resist ash and strip. Replacing the entire module with a backside scrub offers significant chemical cost savings, process cycle time reduction and increased sink, coater and asher capacity. Detailed descriptions of the old and new process and a comparison of particle and yield data are presented. Overall improvement in the manufacturing process is demonstrated by measures of cycle time, chemical cost, personnel efficiency, reduction in equipment purchases, and fab capacity.