一个46ns 256K CMOS SRAM

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1984.1156711

M. Isobe, J. Matsunaga, T. Sakurai, T. Ohtani, K. Sawada, H. Nozawa, T. Iizuka, S. Kohyama

{"title":"一个46ns 256K CMOS SRAM","authors":"M. Isobe, J. Matsunaga, T. Sakurai, T. Ohtani, K. Sawada, H. Nozawa, T. Iizuka, S. Kohyama","doi":"10.1109/ISSCC.1984.1156711","DOIUrl":null,"url":null,"abstract":"A 46ns 32K×8 CMOS RAM fabricated with double metal, double poly 1.2μm P-well technology will be reported. The RAM(59.2mm<sup>2</sup>) has a 10mW operating power at 1MHz and a 30μW standby power.","PeriodicalId":260117,"journal":{"name":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"61 12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 46ns 256K CMOS SRAM\",\"authors\":\"M. Isobe, J. Matsunaga, T. Sakurai, T. Ohtani, K. Sawada, H. Nozawa, T. Iizuka, S. Kohyama\",\"doi\":\"10.1109/ISSCC.1984.1156711\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 46ns 32K×8 CMOS RAM fabricated with double metal, double poly 1.2μm P-well technology will be reported. The RAM(59.2mm<sup>2</sup>) has a 10mW operating power at 1MHz and a 30μW standby power.\",\"PeriodicalId\":260117,\"journal\":{\"name\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"61 12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1984.1156711\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1984.1156711","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 8

摘要

本文报道了一种采用双金属、双聚1.2μm p阱技术制备的46ns 32K×8 CMOS RAM。RAM(59.2mm2)在1MHz时工作功率为10mW，待机功率为30μW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 46ns 256K CMOS SRAM

A 46ns 32K×8 CMOS RAM fabricated with double metal, double poly 1.2μm P-well technology will be reported. The RAM(59.2mm²) has a 10mW operating power at 1MHz and a 30μW standby power.

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1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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