{"title":"体内剂量计低噪声读出电路的设计","authors":"A. E. Mourabit, G. Lu, P. Pittet","doi":"10.1109/ICM.2009.5418587","DOIUrl":null,"url":null,"abstract":"The paper presents a readout circuit associated with photodiodes dedicated to an in-vivo dosimeter. The circuit consists of a fully differential charge sensitive amplifier (CSA) stage, a differential-to-single-ended amplifier stage and a buffered double sampling stage. The CSA implements a switched integration method to minimize dark current contribution to integrated output signal. Its fully differential operation rejects charge injection effect and further cancels dark current effect. Noise analysis is performed to identify main parameters for low-noise design. The double sampling stage is operated by non correlated double sampling (NCDS) to effectively reduce 1/f noise. The circuit operation is validated by transistor-level simulations.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"On the design of a low noise readout circuit for in-vivo dosimeter\",\"authors\":\"A. E. Mourabit, G. Lu, P. Pittet\",\"doi\":\"10.1109/ICM.2009.5418587\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents a readout circuit associated with photodiodes dedicated to an in-vivo dosimeter. The circuit consists of a fully differential charge sensitive amplifier (CSA) stage, a differential-to-single-ended amplifier stage and a buffered double sampling stage. The CSA implements a switched integration method to minimize dark current contribution to integrated output signal. Its fully differential operation rejects charge injection effect and further cancels dark current effect. Noise analysis is performed to identify main parameters for low-noise design. The double sampling stage is operated by non correlated double sampling (NCDS) to effectively reduce 1/f noise. The circuit operation is validated by transistor-level simulations.\",\"PeriodicalId\":391668,\"journal\":{\"name\":\"2009 International Conference on Microelectronics - ICM\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Conference on Microelectronics - ICM\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2009.5418587\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Microelectronics - ICM","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2009.5418587","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
On the design of a low noise readout circuit for in-vivo dosimeter
The paper presents a readout circuit associated with photodiodes dedicated to an in-vivo dosimeter. The circuit consists of a fully differential charge sensitive amplifier (CSA) stage, a differential-to-single-ended amplifier stage and a buffered double sampling stage. The CSA implements a switched integration method to minimize dark current contribution to integrated output signal. Its fully differential operation rejects charge injection effect and further cancels dark current effect. Noise analysis is performed to identify main parameters for low-noise design. The double sampling stage is operated by non correlated double sampling (NCDS) to effectively reduce 1/f noise. The circuit operation is validated by transistor-level simulations.