{"title":"QR分解的定点实现","authors":"C. Singh, S.H. Prasad, P. Balsara","doi":"10.1109/DCAS.2006.321037","DOIUrl":null,"url":null,"abstract":"Matrix triangularization and orthogonalization are prerequisites to solving least square problems and find applications in a wide variety of communication systems and signal processing applications such as MIMO systems and matrix inversion. QR decomposition using modified Gram-Schmidt (MGS) orthogonalization is one of the numerically stable techniques used in this regard. This paper presents a fixed point implementation of QR decomposition based on MGS algorithm using a novel LUT based approach. The proposed architecture is based on log-domain arithmetic operations. The error performance of various fixed-point arithmetic operations has been discussed and optimum LUT sizes are presented based on simulation results for various fractional-precisions. The proposed architecture also paves way for an efficient parallel VLSI implementation of QR decomposition using MGS","PeriodicalId":244429,"journal":{"name":"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"31","resultStr":"{\"title\":\"A Fixed-Point Implementation for QR Decomposition\",\"authors\":\"C. Singh, S.H. Prasad, P. Balsara\",\"doi\":\"10.1109/DCAS.2006.321037\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Matrix triangularization and orthogonalization are prerequisites to solving least square problems and find applications in a wide variety of communication systems and signal processing applications such as MIMO systems and matrix inversion. QR decomposition using modified Gram-Schmidt (MGS) orthogonalization is one of the numerically stable techniques used in this regard. This paper presents a fixed point implementation of QR decomposition based on MGS algorithm using a novel LUT based approach. The proposed architecture is based on log-domain arithmetic operations. The error performance of various fixed-point arithmetic operations has been discussed and optimum LUT sizes are presented based on simulation results for various fractional-precisions. The proposed architecture also paves way for an efficient parallel VLSI implementation of QR decomposition using MGS\",\"PeriodicalId\":244429,\"journal\":{\"name\":\"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software\",\"volume\":\"69 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"31\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCAS.2006.321037\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCAS.2006.321037","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Matrix triangularization and orthogonalization are prerequisites to solving least square problems and find applications in a wide variety of communication systems and signal processing applications such as MIMO systems and matrix inversion. QR decomposition using modified Gram-Schmidt (MGS) orthogonalization is one of the numerically stable techniques used in this regard. This paper presents a fixed point implementation of QR decomposition based on MGS algorithm using a novel LUT based approach. The proposed architecture is based on log-domain arithmetic operations. The error performance of various fixed-point arithmetic operations has been discussed and optimum LUT sizes are presented based on simulation results for various fractional-precisions. The proposed architecture also paves way for an efficient parallel VLSI implementation of QR decomposition using MGS