Designing many-core platforms for silicon-efficient embedded multimedia computing

Programmability is a key requirement for fast time-to-market and agile adaptation to rapidly evolving multimedia standards and customer expectations. Unfortunately, programmable architectures come with order-of-magnitude computational density and energy efficiency gaps with respect to custom-fit hardware. Is there a way to escape the flexibility vs. efficiency dualism? Is nano-scale silicon technology adding new facets to this “no free lunch” view? In this talk I will describe key architectural and technology cornerstones of silicon-efficient throughput computing and provide some insight on how we hope to give positive answers to these fundamental questions.