{"title":"用于CMOS功率放大器的数字调谐三频带变压器功率合成器","authors":"Rahul Singh, J. Paramesh","doi":"10.1109/RFIC.2017.7969085","DOIUrl":null,"url":null,"abstract":"This paper presents the design and implementation of a CMOS transformer combiner that can be reconfigured to have similar efficiencies at widely separated frequency bands. Conventional transformer combiners employ a fixed tuning capacitance in the secondary network to optimize the efficiency for single frequency standard. In this work, we present a modified transformer combiner where digitally-switchable capacitors introduced at low-swing nodes within the combiner network enable frequency reconfiguration using CMOS switches. A 65 nm CMOS triple-band (2.5/3/3.5 GHz) power amplifier (PA) chip employing the reconfigurable combiner is also presented.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"46 41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A digitally-tuned triple-band transformer power combiner for CMOS power amplifiers\",\"authors\":\"Rahul Singh, J. Paramesh\",\"doi\":\"10.1109/RFIC.2017.7969085\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and implementation of a CMOS transformer combiner that can be reconfigured to have similar efficiencies at widely separated frequency bands. Conventional transformer combiners employ a fixed tuning capacitance in the secondary network to optimize the efficiency for single frequency standard. In this work, we present a modified transformer combiner where digitally-switchable capacitors introduced at low-swing nodes within the combiner network enable frequency reconfiguration using CMOS switches. A 65 nm CMOS triple-band (2.5/3/3.5 GHz) power amplifier (PA) chip employing the reconfigurable combiner is also presented.\",\"PeriodicalId\":349922,\"journal\":{\"name\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"46 41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2017.7969085\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2017.7969085","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A digitally-tuned triple-band transformer power combiner for CMOS power amplifiers
This paper presents the design and implementation of a CMOS transformer combiner that can be reconfigured to have similar efficiencies at widely separated frequency bands. Conventional transformer combiners employ a fixed tuning capacitance in the secondary network to optimize the efficiency for single frequency standard. In this work, we present a modified transformer combiner where digitally-switchable capacitors introduced at low-swing nodes within the combiner network enable frequency reconfiguration using CMOS switches. A 65 nm CMOS triple-band (2.5/3/3.5 GHz) power amplifier (PA) chip employing the reconfigurable combiner is also presented.