On Prognosis of Manufacturing of a Bit-Cell without Read-Port Transistors. An Approach to Increase Integration Rate

An actual and intensively solving problems of solid state electronics is increasing of integration rate of elements of integrated circuits (p-n-junctions, their systems et al) [1-8]. Increasing of the integration rate leads to necessity to decrease their dimensions. To decrease the dimensions are using several approaches. They are widely using laser and microwave types of annealing of infused dopants. These types of annealing are also widely using for annealing of radiation defects, generated during ion implantation [9-17]. Using the approaches gives a possibility to increase integration rate of elements of integrated circuits through in homogeneity of technological parameters due to generating inhomogenous distribution of temperature. In this situation one can obtain decreasing dimensions of elements of integrated circuits [18] with account Arrhenius law [1,3]. Another approach to manufacture elements of integrated circuits with smaller dimensions is doping of heterostructure by diffusion or ion implantation [1-3]. However in this case optimization of dopant and/or radiation defects is required [18].