RRAM用Si外延对I-NPN选择器中低于0.5 v冲击电离的观察及其理想性的改善

B. Das, R. Meshram, V. Ostwal, J. Schulze, U. Ganguly
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引用次数: 7

摘要

尽管硅具有较高的1eV带隙,但在低于0.5 v时的冲击电离证明了理想性的提高。NIPIN结构由于结的内置电位(~1eV)以及Va (IMOS中一个简单的pn结)为II提供足够的电子(>带隙)能量而产生高内场。此外,采用i区来增加散射长度的掺杂轮廓工程可能是低偏置下有效的冲击电离的原因,从而实现创纪录的低偏置II(表1),这对高级存储器和逻辑具有吸引力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Observation of impact ionization at sub-0.5V and resultant improvement in ideality in I-NPN selector device by Si epitaxy for RRAM applications
The improvement in ideality is demonstrated by impact ionization at sub-0.5V in silicon despite the higher 1eV band-gap. The NIPIN structure produces high internal field due to the built-in potential (~1eV) of the junctions in addition to Va (cf. a simple pn junction in IMOS) which provides electron sufficient (>bandgap) energy for II. In addition, the dopant profile engineering with i-region to increase scattering length is possibly responsible to effective Impact Ionization at low bias enabling record low bias II (Table 1 that is attractive for advanced memory and logic.
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