{"title":"基于CHOPIN-2的高性能数据路径的面积和时间优化","authors":"L. Rijnders, Z. Sahraoui, P. Six, H. de Man","doi":"10.1109/ESSCIRC.1992.5468189","DOIUrl":null,"url":null,"abstract":"High throughput applications require dedicated datapaths. Their performance can be improved by selecting an appropriate logic implementation and by optimising the number and position of pipeline registers. The CHOPIN-2 toolbox provides the user with the possibility to generate a number of design alternatives and optimise the clock speed. The CHOPIN-2 system has been implemented and tested on a number of industrial datapaths.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"198 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Area and Timing Optimisation of high performant datapaths with CHOPIN-2\",\"authors\":\"L. Rijnders, Z. Sahraoui, P. Six, H. de Man\",\"doi\":\"10.1109/ESSCIRC.1992.5468189\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High throughput applications require dedicated datapaths. Their performance can be improved by selecting an appropriate logic implementation and by optimising the number and position of pipeline registers. The CHOPIN-2 toolbox provides the user with the possibility to generate a number of design alternatives and optimise the clock speed. The CHOPIN-2 system has been implemented and tested on a number of industrial datapaths.\",\"PeriodicalId\":242379,\"journal\":{\"name\":\"ESSCIRC '92: Eighteenth European Solid-State Circuits conference\",\"volume\":\"198 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '92: Eighteenth European Solid-State Circuits conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1992.5468189\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1992.5468189","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Area and Timing Optimisation of high performant datapaths with CHOPIN-2
High throughput applications require dedicated datapaths. Their performance can be improved by selecting an appropriate logic implementation and by optimising the number and position of pipeline registers. The CHOPIN-2 toolbox provides the user with the possibility to generate a number of design alternatives and optimise the clock speed. The CHOPIN-2 system has been implemented and tested on a number of industrial datapaths.