G. Anzalone, E. Monaco, G. Albasini, S. Erba, A. Mazzanti
{"title":"一种基于28nm FDSOI CMOS的0.2-11.7GHz高精度注入锁定多相发生器,具有混合模拟/数字校准环路","authors":"G. Anzalone, E. Monaco, G. Albasini, S. Erba, A. Mazzanti","doi":"10.1109/ESSCIRC.2016.7598310","DOIUrl":null,"url":null,"abstract":"An injection-locked ring oscillator (ILRO) leveraging mixed analog/digital calibration loops for high-accuracy 8-phase clock generation is proposed. A phase detector (PD) based on passive mixers measures the quadrature error and continuously tunes the oscillator for fine phase correction. Concurrently, a window comparator monitors the PD output and drives digital coarse calibration in background. The ILRO maintains high phase accuracy over a wide operation frequency range and large supply and temperature variations. The chip is fabricated in 28nm FDSOI CMOS and with power consumption from 3mW to 15mW, measurements demonstrate a 0.2-11.7GHz frequency range with better than 1.5° quadrature phase error over ±20% supply and -40×120°C temperature variations. Measured performances meet the requirements of 1-to-45Gb/s quarter-rate multi-standard I/O receivers.","PeriodicalId":246471,"journal":{"name":"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 0.2–11.7GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS\",\"authors\":\"G. Anzalone, E. Monaco, G. Albasini, S. Erba, A. Mazzanti\",\"doi\":\"10.1109/ESSCIRC.2016.7598310\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An injection-locked ring oscillator (ILRO) leveraging mixed analog/digital calibration loops for high-accuracy 8-phase clock generation is proposed. A phase detector (PD) based on passive mixers measures the quadrature error and continuously tunes the oscillator for fine phase correction. Concurrently, a window comparator monitors the PD output and drives digital coarse calibration in background. The ILRO maintains high phase accuracy over a wide operation frequency range and large supply and temperature variations. The chip is fabricated in 28nm FDSOI CMOS and with power consumption from 3mW to 15mW, measurements demonstrate a 0.2-11.7GHz frequency range with better than 1.5° quadrature phase error over ±20% supply and -40×120°C temperature variations. Measured performances meet the requirements of 1-to-45Gb/s quarter-rate multi-standard I/O receivers.\",\"PeriodicalId\":246471,\"journal\":{\"name\":\"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2016.7598310\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2016.7598310","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.2–11.7GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS
An injection-locked ring oscillator (ILRO) leveraging mixed analog/digital calibration loops for high-accuracy 8-phase clock generation is proposed. A phase detector (PD) based on passive mixers measures the quadrature error and continuously tunes the oscillator for fine phase correction. Concurrently, a window comparator monitors the PD output and drives digital coarse calibration in background. The ILRO maintains high phase accuracy over a wide operation frequency range and large supply and temperature variations. The chip is fabricated in 28nm FDSOI CMOS and with power consumption from 3mW to 15mW, measurements demonstrate a 0.2-11.7GHz frequency range with better than 1.5° quadrature phase error over ±20% supply and -40×120°C temperature variations. Measured performances meet the requirements of 1-to-45Gb/s quarter-rate multi-standard I/O receivers.