{"title":"根据成本和性能优化选择封装技术和电路分区","authors":"J. Jacobsen, D. Hopkins","doi":"10.1109/APEC.2000.826079","DOIUrl":null,"url":null,"abstract":"Most power electronics circuits are packaged using two or more power electronics packaging technologies. To optimally select and use several technologies that meet performance requirements at minimum cost requires a strategic partitioning of the circuit. Presented is a structured technique for optimally selecting technologies based on a relative cost diagram. Other factors, such as performance, product volume and modularity are included.","PeriodicalId":347959,"journal":{"name":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","volume":"360 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Optimally selecting packaging technologies and circuit partitions based on cost and performance\",\"authors\":\"J. Jacobsen, D. Hopkins\",\"doi\":\"10.1109/APEC.2000.826079\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Most power electronics circuits are packaged using two or more power electronics packaging technologies. To optimally select and use several technologies that meet performance requirements at minimum cost requires a strategic partitioning of the circuit. Presented is a structured technique for optimally selecting technologies based on a relative cost diagram. Other factors, such as performance, product volume and modularity are included.\",\"PeriodicalId\":347959,\"journal\":{\"name\":\"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)\",\"volume\":\"360 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-02-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC.2000.826079\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.2000.826079","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimally selecting packaging technologies and circuit partitions based on cost and performance
Most power electronics circuits are packaged using two or more power electronics packaging technologies. To optimally select and use several technologies that meet performance requirements at minimum cost requires a strategic partitioning of the circuit. Presented is a structured technique for optimally selecting technologies based on a relative cost diagram. Other factors, such as performance, product volume and modularity are included.