偶尔错过截止日期的嵌入式控制系统鲁棒协同综合

A. Behrouzian, Dip Goswami, T. Basten
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引用次数: 2

摘要

反馈控制应用程序对偶尔错过的截止日期是健壮的。这打开了在嵌入式平台上节省稀缺资源(计算和通信)的可能性。控制回路的稳定性和性能要求对可接受的错过截止日期的模式施加了限制(例如,不能连续错过太多)。这些要求由(m,k)-牢固性条件捕获。也就是说,在任意k个连续作业中,至少有m个控制计算作业必须在截止日期前完成。(m,k)-firm设计需要(i)根据(m,k)-firm截止日期表示稳定性和性能要求(ii)考虑(m,k)-firmness参数的控制器合成(iii)进度分析以验证满足firmness条件的保证。我们提出了这三个设计组件的协同合成框架,并举例说明其适用性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Robust co-synthesis of embedded control systems with occasional deadline misses
Feedback control applications are robust to occasional deadline misses. This opens up the possibility of saving scarce (computation and communication) resources on embedded platforms. Stability and performance requirements of a control loop impose restrictions on acceptable patterns of deadline misses (e.g., not too many misses in a row). Such requirements are captured by (m,k)-firmness conditions. That is, at least m control computation jobs must meet deadlines in any k consecutive jobs. (m,k)-firm design requires (i) representation of stability and performance requirements in terms of (m,k)-firm deadlines (ii) controller synthesis taking into account the (m,k)-firmness parameters (iii) schedule analysis to verify guarantees on meeting the firmness conditions. We present a co-synthesis framework for these three design components and illustrate its applicability with examples.
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