Analysis of the effects of single event transients on an SAR-ADC based on charge redistribution

This work presents a study on the effects of Single Event Transients on SAR A/D converters based on charge redistribution. The effects of SETs are analyzed considering the worst-case pulses for the 130nm CMOS process. In this work, the fault injection is concentrated on the switches of the capacitor array of the studied converter. Preliminary results show that the transient effects may change the state of one or more bits of conversion. This is due the fact that the affected stage may propagate an incorrect value to the remainder of the conversion, leading to multiple bit errors on the converted data. Moreover, a SET occurring on the switch connected to the common node of the capacitors may lead to an incorrect behavior that cannot be attenuated with the increasing on the sizing of the transistors, which suggests that additional fault tolerance techniques may be needed.