硅纳米线CMOS制造与RMG FinFET技术的最小偏差显示创纪录的性能

2015 Symposium on VLSI Technology (VLSI Technology) Pub Date : 2015-06-16 DOI:10.1109/VLSIT.2015.7223653

I. Lauer, N. Loubet, S. Kim, J. Ott, S. Mignot, R. Venigalla, T. Yamashita, T. Standaert, J. Faltermeier, V. Basker, B. Doris, M. Guillorn

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引用次数: 42

摘要

我们展示了一种用于创建栅极全域(GAA)硅纳米线(SiNW) mosfet的工艺流程，与用于大批量生产的传统替代金属栅极(RMG) finFET技术的偏差最小。利用这种技术，我们展示了在sub- 100nm栅极间距下GAA SiNW mosfet和功能高速环形振荡器的最高直流性能。

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Si nanowire CMOS fabricated with minimal deviation from RMG FinFET technology showing record performance

We demonstrate a process flow for creating gate-all-around (GAA) Si nanowire (SiNW) MOSFETs with minimal deviation from conventional replacement metal gate (RMG) finFET technology as used in high-volume manufacturing. Using this technique, we demonstrate the highest DC performance shown for GAA SiNW MOSFETs at sub-100 nm gate pitch, and functional high-speed ring oscillators.

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2015 Symposium on VLSI Technology (VLSI Technology)

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