基于dv/dt和di/dt的氮化镓双电平极开关瞬态研究

S. Satpathy, Partha Pratim Das, S. Bhattacharya
{"title":"基于dv/dt和di/dt的氮化镓双电平极开关瞬态研究","authors":"S. Satpathy, Partha Pratim Das, S. Bhattacharya","doi":"10.1109/ECCE-Asia49820.2021.9479426","DOIUrl":null,"url":null,"abstract":"The faster switching transients of GaN devices lead to extremely low switching loss. This is a key feature that makes GaN devices a potential candidate for power converters driving high speed electric machines. The switching transients occur in tens of nanoseconds leading to very high dv/dt and di/dt. This leads to several challenges for both power converter as well as motor load. Switching device voltage overshoot and insulation stress for motors are key concerns among them. A practical operation of power converter needs to consider minimizing the losses while addressing these challenges. Analytical models for switching transient help in investigating the mitigation of these challenges from the gate drive side. This paper presents a systematic modeling approach that divides the turn-on and turn-off transient intervals of a GaN-based two-level pole into sub-intervals responsible for di/dt and dv/dt. The switching loss contribution of each sub-interval and their role in transient overshoot is highlighted. Using switching device voltage overshoot and motor dv/dt as two important constraints, an optimal gate drive is then proposed, which minimizes the switching loss. Spice simulation results are presented for the proposed optimal gate drive of 650 V, 60 A GaN device operating at 400 V DC bus voltage and 40 A device current.","PeriodicalId":145366,"journal":{"name":"2021 IEEE 12th Energy Conversion Congress & Exposition - Asia (ECCE-Asia)","volume":"190 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Study of Switching Transients based on dv/dt and di/dt for a GaN-based Two-Level Pole\",\"authors\":\"S. Satpathy, Partha Pratim Das, S. Bhattacharya\",\"doi\":\"10.1109/ECCE-Asia49820.2021.9479426\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The faster switching transients of GaN devices lead to extremely low switching loss. This is a key feature that makes GaN devices a potential candidate for power converters driving high speed electric machines. The switching transients occur in tens of nanoseconds leading to very high dv/dt and di/dt. This leads to several challenges for both power converter as well as motor load. Switching device voltage overshoot and insulation stress for motors are key concerns among them. A practical operation of power converter needs to consider minimizing the losses while addressing these challenges. Analytical models for switching transient help in investigating the mitigation of these challenges from the gate drive side. This paper presents a systematic modeling approach that divides the turn-on and turn-off transient intervals of a GaN-based two-level pole into sub-intervals responsible for di/dt and dv/dt. The switching loss contribution of each sub-interval and their role in transient overshoot is highlighted. Using switching device voltage overshoot and motor dv/dt as two important constraints, an optimal gate drive is then proposed, which minimizes the switching loss. Spice simulation results are presented for the proposed optimal gate drive of 650 V, 60 A GaN device operating at 400 V DC bus voltage and 40 A device current.\",\"PeriodicalId\":145366,\"journal\":{\"name\":\"2021 IEEE 12th Energy Conversion Congress & Exposition - Asia (ECCE-Asia)\",\"volume\":\"190 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-05-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 12th Energy Conversion Congress & Exposition - Asia (ECCE-Asia)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCE-Asia49820.2021.9479426\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 12th Energy Conversion Congress & Exposition - Asia (ECCE-Asia)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCE-Asia49820.2021.9479426","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

GaN器件更快的开关瞬态导致极低的开关损耗。这是使GaN器件成为驱动高速电机的功率转换器的潜在候选器件的关键特性。开关瞬态发生在几十纳秒内,导致很高的dv/dt和di/dt。这对功率转换器和电机负载都带来了一些挑战。其中开关器件电压超调和电机绝缘应力是关键问题。在解决这些问题的同时,电源变换器的实际运行需要考虑将损耗最小化。开关暂态分析模型有助于从栅极驱动侧研究这些挑战的缓解措施。本文提出了一种系统的建模方法,将氮化镓两电平极的导通和关断暂态区间划分为负责di/dt和dv/dt的子区间。重点分析了各子区间的开关损耗贡献及其在暂态超调中的作用。然后以开关器件电压超调量和电机dv/dt为两个重要约束条件,提出了一种使开关损耗最小的最优栅极驱动。本文给出了在直流母线电压400 V、器件电流40 A条件下工作的650 V、60 A GaN器件的最佳栅极驱动Spice仿真结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Study of Switching Transients based on dv/dt and di/dt for a GaN-based Two-Level Pole
The faster switching transients of GaN devices lead to extremely low switching loss. This is a key feature that makes GaN devices a potential candidate for power converters driving high speed electric machines. The switching transients occur in tens of nanoseconds leading to very high dv/dt and di/dt. This leads to several challenges for both power converter as well as motor load. Switching device voltage overshoot and insulation stress for motors are key concerns among them. A practical operation of power converter needs to consider minimizing the losses while addressing these challenges. Analytical models for switching transient help in investigating the mitigation of these challenges from the gate drive side. This paper presents a systematic modeling approach that divides the turn-on and turn-off transient intervals of a GaN-based two-level pole into sub-intervals responsible for di/dt and dv/dt. The switching loss contribution of each sub-interval and their role in transient overshoot is highlighted. Using switching device voltage overshoot and motor dv/dt as two important constraints, an optimal gate drive is then proposed, which minimizes the switching loss. Spice simulation results are presented for the proposed optimal gate drive of 650 V, 60 A GaN device operating at 400 V DC bus voltage and 40 A device current.
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