The non-full voltage swing TSPC (NSTSPC) logic design

In this paper, a new TSPC logic circuit is proposed for low-voltage high-speed applications. The proposed new circuit using non-full voltage swing scheme in internal nodes to reduce logic evaluation time and to save dynamic power. Thus the advantages of the new TSPC logic circuit over the conventional TSPC logic circuit are speed and power-delay product. Based upon the 0.35 /spl mu/m CMOS technology, the proposed new TSPC logic has 25% improvement over the conventional TSPC circuit in power-delay product. The new circuit can be operated at 250 MHz with 1.2 V supply voltage.