{"title":"超薄氧化物的HREM分析","authors":"R. Sinclair, M. Niwa, T. Kouzaki","doi":"10.1109/ICSICT.1995.503545","DOIUrl":null,"url":null,"abstract":"Ultra-thin SiO/sub 2/ layers on Si (e.g., sub-10 nm) will be increasingly important in future VLSI devices. Precise control of thickness and interface roughness are important parameters. High resolution electron microscopy (HREM) is extremely effective for characterizing such features, as is illustrated here for gate oxides and tunneling oxides.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"1283 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"HREM analysis of ultra-thin oxides\",\"authors\":\"R. Sinclair, M. Niwa, T. Kouzaki\",\"doi\":\"10.1109/ICSICT.1995.503545\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ultra-thin SiO/sub 2/ layers on Si (e.g., sub-10 nm) will be increasingly important in future VLSI devices. Precise control of thickness and interface roughness are important parameters. High resolution electron microscopy (HREM) is extremely effective for characterizing such features, as is illustrated here for gate oxides and tunneling oxides.\",\"PeriodicalId\":286176,\"journal\":{\"name\":\"Proceedings of 4th International Conference on Solid-State and IC Technology\",\"volume\":\"1283 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 4th International Conference on Solid-State and IC Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSICT.1995.503545\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 4th International Conference on Solid-State and IC Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSICT.1995.503545","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ultra-thin SiO/sub 2/ layers on Si (e.g., sub-10 nm) will be increasingly important in future VLSI devices. Precise control of thickness and interface roughness are important parameters. High resolution electron microscopy (HREM) is extremely effective for characterizing such features, as is illustrated here for gate oxides and tunneling oxides.
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